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Microchip Technology /ATSAML11D16A /SUPC /VREG

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Interpret as VREG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ENABLE)ENABLE 0 (LDO)SEL0 (STDBYPL0)STDBYPL0 0 (RUNSTDBY)RUNSTDBY 0 (LPEFF)LPEFF 0 (VREFSEL)VREFSEL 0VSVSTEP0VSPER

SEL=LDO

Description

VREG Control

Fields

ENABLE

Enable
SEL

Voltage Regulator Selection in active mode

0 (LDO): LDO selection

1 (BUCK): Buck selection
STDBYPL0

Standby in PL0
RUNSTDBY

Run during Standby
LPEFF

Low Power efficiency
VREFSEL

Voltage Regulator Voltage Reference Selection
VSVSTEP

Voltage Scaling Voltage Step
VSPER

Voltage Scaling Period

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data